SI/PI/EMI Analysis of Through-Via Effects on Power/Ground Plane using High Dielectric Material

In this paper, we simulated and analyzed about through-via´s signal integrity, (SI)/power integrity, and (PI)/electromagnetic interference (EMI) that goes through the power/ground plane which was caused by the high dielectric material that supports the embedded high value capacitors. In order to evaluate through-via´s effectiveness, the simulation condition was operated on the LTCC module for mixed signal system. For the circumstance SI, delay time of signal line and signal quality significantly decrease because of higher parasitic capacitance between through-via´s and anti-pads. However, in a situation where the dielectric material is chosen, the EMI´s characteristic power/ground plan with embedded high dielectric material shows a better characteristic than when the low dielectric material was chosen. As a result, if the high dielectric material is applied on LTCC module, the mixed module packaging that is made with the digital IC and RF component will be realized as the optimistic design. The simulation structure takes the LTCC process designer guidebook as a basic structure and uses the HFSS/designer tool. When the dielectric constant uses 7.8 and 500, the through-via´s that pass through the LTCC module are delay time of 41.4 psec and 56, respectively. When the dielectric constant of 500 is compared with 7.8, the power/ground plane impedance shows a trait lower than several GHz range and effectiveness in the rejection of the resonance mode. When uses the dielectric constant is 500, the EMI level is 7.8 and it is prove that the EMI level improves at maximum 20 dB V/m.