Mechanism and growth rate of underfill delaminations in flip chips

Delamination of underfill in flip chips is a widely accepted major cause for failure. However, there is a lack of information on the mechanism of this effect. A novel methodology is used to examine these delaminations in this paper. Instead of the expensive and time-consuming scanning acoustic microscopy with limited resolution, an optical method is established. For that the silicon chip was replaced by a glass chip (Pyrex). With usual passivations, the component is comparable to silicon flip chips from the mechanical point of view. This gives the possibility to look at the interface underfill/passivation or underfill/PCB by a microscope and a CCD camera. Photo analysis software allows to quantify delaminated versus not delaminated regions. Hence, an evaluational method for material and geometric impacts to delaminations is available. The effect of the following parameters were observed: chip size, bump height, substrate thickness; passivation, underfill material; flux material, die sites with and without solder resist. Beside other results, it has been shown, that the most reliable combination was made of 0.8 mm substrate, a passivation of SiO₂ and no use of solder resist. A good meniscus could improve the hydro-thermal fatigue. As a function of geometric parameters different behavior of crack growth were found