DocumentCode
3162256
Title
Design method for high reliable flip chip BGA package
Author
Saito, Naoto ; Yamada, Osamu ; Ono, Takayuki ; Uda, Takayuki
Author_Institution
Mech. Eng. Res. Lab., Hitachi Ltd., Tsuchiura, Japan
fYear
2001
fDate
2001
Firstpage
270
Lastpage
275
Abstract
An efficient design method for flip chip ball grid array (BGA) packages has been developed. This method uses design of experiment (DOE), a series of finite element (FE) stress analyses based on an orthogonal array used in DOE, and statistical analysis. By using this method to design a BGA package having 1600 pins, the warpage of the optimum packaging structure is very small and all of the reliability demands are satisfied
Keywords
ball grid arrays; design of experiments; finite element analysis; flip-chip devices; reliability; statistical analysis; stress analysis; design methodology; design of experiments; finite element stress analysis; flip-chip ball grid array package; orthogonal array; reliability; statistical analysis; Delamination; Design methodology; Electronics packaging; Flip chip; Laboratories; Large scale integration; Resins; Silicon; Tensile stress; US Department of Energy;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2001. Proceedings., 51st
Conference_Location
Orlando, FL
ISSN
0569-5503
Print_ISBN
0-7803-7038-4
Type
conf
DOI
10.1109/ECTC.2001.927734
Filename
927734
Link To Document