DocumentCode
3162574
Title
Design and thermo-mechanical analysis of a Dimple-Array Interconnect technique for power semiconductor devices
Author
Wen, Simon S. ; Huff, Dan ; Lu, Guo-Quan
Author_Institution
Bradley Dept. of Electr. & Comput. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
fYear
2001
fDate
2001
Firstpage
378
Lastpage
383
Abstract
A simple wireless-bond interconnect technique, termed Dimple-Array Interconnect (DAI) technique for packaging power devices and modules is presented in this paper. Electrical connections onto the devices are established by soldering arrays of dimples pre-formed on a metal sheet. Preliminary electrical and thermomechanical modeling results on a prototype DAI power module demonstrated potential advantages of this technique to include reduced parasitic noises, improved thermo-mechanical reliability, as well as lowered processing complexity
Keywords
interconnections; power semiconductor devices; semiconductor device noise; semiconductor device packaging; semiconductor device reliability; DAI; Dimple-Array Interconnect technique; electrical connections; parasitic noises; power semiconductor devices; processing complexity; thermo-mechanical analysis; wireless-bond interconnect technique; Electronic packaging thermal management; Integrated circuit interconnections; Multichip modules; Power electronics; Power system interconnection; Semiconductor device packaging; Soldering; Thermal management; Thermomechanical processes; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2001. Proceedings., 51st
Conference_Location
Orlando, FL
ISSN
0569-5503
Print_ISBN
0-7803-7038-4
Type
conf
DOI
10.1109/ECTC.2001.927752
Filename
927752
Link To Document