• DocumentCode
    3162644
  • Title

    Performance analysis of single-buffered multistage interconnection networks

  • Author

    Hsiao, Shuo-Hsien ; Chen, C. Y Roger

  • Author_Institution
    Sch. of Comput. & Inf. Sci., Syracuse Univ., NY, USA
  • fYear
    1991
  • fDate
    2-5 Dec 1991
  • Firstpage
    864
  • Lastpage
    867
  • Abstract
    A new model for the performance evaluation of single-buffered multistage interconnection networks (MINs) is proposed. Previous models proposed in solving this problem are either not accurate enough or only applicable to a special case where the switching elements (SEs) are 2×2 crossbars. This new model allows the analysis of a MIN with arbitrary sizes of a×a SEs and, through extensive simulations, has been shown to be very accurate. Since only three states are required at each stage of a MIN, this model is efficient computationally
  • Keywords
    multiprocessor interconnection networks; performance evaluation; 2×2 crossbars; model; performance analysis; single-buffered multistage interconnection networks; switching elements; Analytical models; Bars; Clocks; Computational modeling; Computer networks; Costs; Information science; Multiprocessor interconnection networks; Performance analysis; Petri nets;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing, 1991. Proceedings of the Third IEEE Symposium on
  • Conference_Location
    Dallas, TX
  • Print_ISBN
    0-8186-2310-1
  • Type

    conf

  • DOI
    10.1109/SPDP.1991.218230
  • Filename
    218230