• DocumentCode
    3162853
  • Title

    Multistage bus network (MBN): an interconnection network for cache coherent multiprocessors

  • Author

    Bhuyan, Laxmi N. ; Nanda, Ashwini K.

  • Author_Institution
    Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
  • fYear
    1991
  • fDate
    2-5 Dec 1991
  • Firstpage
    780
  • Lastpage
    787
  • Abstract
    Single bus multiprocessor systems do not scale well due to the limited bandwidth of the bus. Hierarchical bus interconnections are scalable, but unfortunately the top level bus becomes a bottleneck for larger systems. The authors present a novel interconnection network called the multistage bus network (MBN). The MBN consists of multiple stages of buses and it preserves the bandwidth properties of a conventional multistage interconnection network (MIN). At the same time the MBN also retains the economic design and fast broadcast advantages of the bus based systems. They show that the MBN performs almost as good as a MIN and is much more cost effective than the MIN. They also design and study a multistage snooping cache protocol for the MBN
  • Keywords
    multiprocessor interconnection networks; protocols; bandwidth properties; bus based systems; cache coherent multiprocessors; economic design; interconnection network; multistage bus networks; multistage snooping cache protocol; Bandwidth; Broadcasting; Costs; Environmental economics; Multiprocessing systems; Multiprocessor interconnection networks; Protocols; Scalability; Switches; Telecommunication traffic;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing, 1991. Proceedings of the Third IEEE Symposium on
  • Conference_Location
    Dallas, TX
  • Print_ISBN
    0-8186-2310-1
  • Type

    conf

  • DOI
    10.1109/SPDP.1991.218241
  • Filename
    218241