Differential PSK detector ASIC design for direct sequence spread spectrum radio

Author

Olson, Henrik ; Kerek, Daniel ; Oelmann, Bengt ; Tenhunen, Hannu

Author_Institution

Electron. Syst. Design Lab., R. Inst. of Technol., Stockholm, Sweden

fYear

1996

fDate

23-27 Sep 1996

Firstpage

97

Lastpage

101

Abstract

In this paper we present an optimized architecture for differential PSK detection which effectively minimizes the required logic complexity for ASIC implementation. This complexity reduction is obtained by carrying out intelligent truncation of the detector input words and by utilizing a bit-serial/word-parallel structure. We also show that this can be done without degrading the performance in terms of bit error rate. The structure has been implemented in a direct sequence spread spectrum transceiver circuit, and preliminary measurement results are presented

Keywords

CMOS digital integrated circuits; application specific integrated circuits; cellular radio; detector circuits; differential phase shift keying; digital radio; error statistics; land mobile radio; modems; spread spectrum communication; transceivers; 0.8 micron; 120 to 140 mW; 3.3 V; 50 MHz; ASIC design; BER; DS-SS radio; DS-SS transceiver circuit; bit error rate; bit-serial/word-parallel structure; detector input words; differential PSK detector; direct sequence spread spectrum; intelligent truncation; optimized architecture; AWGN; Additive white noise; Application specific integrated circuits; Phase detection; Phase frequency detector; Phase shift keying; Radio transmitters; Signal processing algorithms; Signal to noise ratio; Spread spectrum communication;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1996. Proceedings., Ninth Annual IEEE International

Conference_Location

Rochester, NY

ISSN

1063-0988

Print_ISBN

0-7803-3302-0

Type

conf

DOI

10.1109/ASIC.1996.551970

Filename

551970