Title :
A GaAs ASIC chip set for 10 Gb/s SDH-based optical transmission system
Author :
Lee, Seog-Hoon ; Kim, Jong-Ho ; Kim, Dong-Hyun
Author_Institution :
Electron. & Telecommun. Res. Inst., Taejon, South Korea
Abstract :
A chip set has been designed for 10 Gb/s SDH-based optical transmission system and developed using GaAs gate array technology. The features supported by the chip set include 8:1 multiplexing and demultiplexing, frame alignment word insertion and detection, 32-bit parallel scrambling and descrambling, and B1 byte insertion and error detection. A parallel implementation of the STM overhead functions using TDM achieves a substantial decrease in operating frequency with only a small increase in gate complexity, hence it provides reduction of the power dissipation. This paper describes the architecture of the chip set, parallel circuit design technologies suitable for very high-speed SDH-based optical transmission system, and several of the chip set´s more interesting features
Keywords :
III-V semiconductors; application specific integrated circuits; demultiplexing; digital communication; gallium arsenide; logic arrays; optical communication equipment; optical fibre communication; synchronisation; synchronous digital hierarchy; 10 Gbit/s; 32 bit; ASIC chip set; GaAs; SDH-based optical transmission system; STM overhead functions; TDM; byte insertion; demultiplexing; descrambling; frame alignment word insertion; gate array technology; gate complexity; multiplexing; operating frequency; power dissipation; scrambling; Application specific integrated circuits; Circuit synthesis; Demultiplexing; Frequency; Gallium arsenide; High speed optical techniques; Optical arrays; Optical design; Power dissipation; Time division multiplexing;
Conference_Titel :
ASIC Conference and Exhibit, 1996. Proceedings., Ninth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-3302-0
DOI :
10.1109/ASIC.1996.551977
