Design of a multichip module containing a 12 Way S/390 microprocessor subsystem

Author

Kohler, Helmut

Author_Institution

Processor Subsyst. Dev., IBM Lab., Boeblingen, Germany

fYear

1996

fDate

23-27 Sep 1996

Firstpage

187

Lastpage

190

Abstract

This paper presents the development strategy of a high performance S/390 CMOS microprocessor subsystem packaged on a 127 mm MCM. The MCM houses the complete processor core components like BU, FPU, L1-cache, L2-cache, bus-switch and DMA-controller. This multichip module set another milestone regarding miniaturization complexity and testability. The MCM-internal-net count was above 10.000 while the signals leaving the MCM passed 1700. Chipsize is up to 14.5 mm×14.5 mm

Keywords

CMOS digital integrated circuits; integrated circuit design; microprocessor chips; multichip modules; 12 Way S/390 CMOS microprocessor subsystem; design; multichip module; packaging; CMOS process; CMOS technology; Chip scale packaging; DSL; Design methodology; Laboratories; Logic testing; Microprocessors; Multichip modules; Shape control;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1996. Proceedings., Ninth Annual IEEE International

Conference_Location

Rochester, NY

ISSN

1063-0988

Print_ISBN

0-7803-3302-0

Type

conf

DOI

10.1109/ASIC.1996.551991

Filename

551991

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3163377