• DocumentCode
    3163406
  • Title

    The M-cache: a message-retrieving mechanism for multicomputer systems

  • Author

    Draper, Jeffrey T. ; Ghosh, Joydeep ; Athas, William C.

  • Author_Institution
    Dept. of ECE, Texas Univ., Austin, TX, USA
  • fYear
    1991
  • fDate
    2-5 Dec 1991
  • Firstpage
    258
  • Lastpage
    265
  • Abstract
    Presents the design and evaluation of the M-cache, a small, fast and intelligent memory for handling messages at the processing nodes of multicomputer systems. The M-cache provides hardware support for the message search operation often performed in message-directed programming. It also provides a mechanism for bandwidth matching between the interconnection network and local memory of a node. Through simulation experiments, the authors have studied the execution of concurrent algorithms on systems with and without M-caches to obtain relative speedup measures. The results show that a modest investment in silicon is sufficient to effect over an order of magnitude reduction in message-retrieval time. Such hardware support is needed to make the cost-effective implementation of fine-grain concurrent programs a reality
  • Keywords
    buffer storage; parallel algorithms; parallel architectures; M-cache; concurrent algorithms; intelligent memory; message search; message-retrieving mechanism; multicomputer systems; speedup measures; Bandwidth; Computational modeling; Coprocessors; Hardware; Investments; Message passing; Multiprocessor interconnection networks; Operating systems; Routing; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing, 1991. Proceedings of the Third IEEE Symposium on
  • Conference_Location
    Dallas, TX
  • Print_ISBN
    0-8186-2310-1
  • Type

    conf

  • DOI
    10.1109/SPDP.1991.218271
  • Filename
    218271