DocumentCode :
3164284
Title :
Cutwidth approximation in linear time
Author :
Booth, Heather D. ; Govindan, Rajeev ; Langston, Michael A. ; Ramachandramurthi, Siddharthan
Author_Institution :
Dept. of Comput. Sci., Tennessee Univ., Knoxville, TN, USA
fYear :
1992
fDate :
28-29 Feb 1992
Firstpage :
70
Lastpage :
73
Abstract :
Graph width metrics have been widely studied for their relevance to VLSI design. Examples include cutwidth, pathwidth, bandwidth and several others that arise in circuit layout. When the width is bounded, graphs that satisfy these metrics can often be recognized by finite lists of obstruction tests. One of the most foundational tests is to determine whether K4 is immersed in a graph. The authors present for the first time a fast, practical algorithm to perform this test, and discuss its relevance to cutwidth and other metrics
Keywords :
VLSI; circuit layout CAD; graph theory; VLSI design; bandwidth; circuit layout; cutwidth approximation; graph width metrics; linear time; obstruction tests; pathwidth; Bandwidth; Character recognition; Circuit testing; Computer science; Contracts; Linear approximation; Performance evaluation; Polynomials; Tree graphs; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI, 1992., Proceedings of the Second Great Lakes Symposium on
Conference_Location :
Kalamazoo, MI
Print_ISBN :
0-8186-2610-0
Type :
conf
DOI :
10.1109/GLSV.1992.218363
Filename :
218363
Link To Document :
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