DocumentCode
3164322
Title
Models for bit-true simulation and high-level synthesis of DSP applications
Author
Pauwels, Marc ; Lanneer, Dirk ; Catthoor, Francky ; Goossens, Gert ; De Man, Hugo
Author_Institution
IMEC vzw, Heverlee, Belgium
fYear
1992
fDate
28-29 Feb 1992
Firstpage
52
Lastpage
59
Abstract
Real-time DSP applications require a bit-true synthesis system to generate correct and efficient ASICs. This requires concise simulation and synthesis models, which are presented in this paper and exemplified for a non-restoring division operation. Such models are used in the synthesis library of bit-true Cathedral-II compiler, by which industrial size applications have been synthesised
Keywords
application specific integrated circuits; circuit layout CAD; digital signal processing chips; ASICs; Cathedral-II compiler; DSP applications; bit-true simulation; bit-true synthesis; digital signal processing; high-level synthesis; simulation; Application specific integrated circuits; Digital signal processing; High level synthesis; Kernel; Libraries; Quantization; Real time systems; Signal processing algorithms; Signal synthesis; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI, 1992., Proceedings of the Second Great Lakes Symposium on
Conference_Location
Kalamazoo, MI
Print_ISBN
0-8186-2610-0
Type
conf
DOI
10.1109/GLSV.1992.218365
Filename
218365
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