Title :
A low power VLSI neural network based arrythmia classifier
Author :
Shawkey, H. ; Elsimary, H. ; Ragaai, H. ; Haddara, H.
Author_Institution :
Electron. Res. Inst., Cairo, Egypt
Abstract :
Implantable cardioverter defibrillators (ICDs) detect and treat dangerous cardiac arrhythmia. This paper describes a low-power VLSI neural network chip which acts as an intracardiac tachycardia classification system. A robust neural network reduces the impact of noise, drift and offsets that are inherent in analog applications. Our system uses a Kohonen self-organizing map, and has a typical power consumption of a few milliwatts
Keywords :
VLSI; biomedical equipment; cardiology; defibrillators; medical signal processing; neural chips; pattern classification; power consumption; self-organising feature maps; signal processing equipment; Kohonen self-organizing map; analog applications; cardiac arrhythmia classifier; drift; implantable cardioverter defibrillators; intracardiac tachycardia classification system; low-power VLSI neural network chip; noise; offsets; power consumption; Analog circuits; Heart; Morphology; Neural networks; Neurons; Rhythm; Temperature; Thyristors; Very large scale integration; World Wide Web;
Conference_Titel :
Computer-Based Medical Systems, 1998. Proceedings. 11th IEEE Symposium on
Conference_Location :
Lubbock, TX
Print_ISBN :
0-8186-8564-6
DOI :
10.1109/CBMS.1998.701376
