Title :
Proceedings of the Second Great Lakes Symposium on VLSI (Cat. No.91TH0411-9)
Abstract :
The following topics are dealt with: testability and built-in self-test; placement and routing; graph theory applications; channel routing; switchbox routing; VLSI design; specialized routing; via minimization; simulation; Steiner trees; and clock routing
Keywords :
VLSI; built-in self test; circuit layout CAD; graph theory; Steiner trees; VLSI design; built-in self-test; channel routing; clock routing; graph theory; placement; routing; simulation; switchbox routing; testability; via minimization;
Conference_Titel :
VLSI, 1992., Proceedings of the Second Great Lakes Symposium on
Conference_Location :
Kalamazoo, MI, USA
Print_ISBN :
0-8186-2610-0
DOI :
10.1109/GLSV.1992.218373
