Petri net modelling in embedded system design

Author

Benders, L.P.M. ; Stevens, M.P.J.

Author_Institution

Dept. of Electr. Eng., Eindhoven Univ. of Technol., Netherlands

fYear

1992

fDate

4-8 May 1992

Firstpage

612

Lastpage

617

Abstract

A very high-speed integrated circuit hardware description language (VHDL)-based language for high-level synthesis was used for task-level embedded systems specification. The language has constructs for message passing, mutual data protection, concurrency, and synchronization. The system specification was modeled with colored Petri nets, allowing concurrency visualization, deadlock detection, starvation detection, protocol requirements analysis, and potential resource sharing identification. The data transformation was modeled by using coloring functions. The specification language, the colored Petri nets, the nets modeling the concurrency, and the translation of the specification to the nets are discussed.<>

Keywords

Petri nets; concurrency control; performance evaluation; protocols; real-time systems; specification languages; Petri net modelling; concurrency; concurrency visualization; deadlock detection; embedded system design; high-level synthesis; message passing; mutual data protection; nets modeling; protocol requirements analysis; resource sharing identification; starvation detection; synchronization; task-level embedded systems specification; very high-speed integrated circuit hardware description language; Concurrent computing; Data visualization; Embedded system; Hardware design languages; High level synthesis; High speed integrated circuits; Message passing; Petri nets; Protection; System recovery;

fLanguage

English

Publisher

ieee

Conference_Titel

CompEuro '92 . 'Computer Systems and Software Engineering',Proceedings.

Conference_Location

The Hague, Netherlands

Print_ISBN

0-8186-2760-3

Type

conf

DOI

10.1109/CMPEUR.1992.218464

Filename

218464