A comparison of large I/O flip chip and wire bonded packages

Author

Bulumulla, S.B. ; Caggiano, M.F. ; Lischner, D.J. ; Wolf, R.K.

Author_Institution

Lucent Technol. Bell Labs., Breinigsville, PA, USA

fYear

2001

fDate

2001

Firstpage

1122

Lastpage

1126

Abstract

As many of the large ASICs integrate high speed I/O macro-cells, there is increasing interest in the electrical performance of high ball count packages. The wire bond interconnects, plating bars and package structures have come under close scrutiny as it has become paramount to improve the performance of large packages to meet system requirements. This work presents measured data on high ball count wire bond and flip chip packages and compares the performance of both types of packages. The results show the bandwidth limitation of the wire bond packages as well as the performance differences between different types of flip chip packages

Keywords

application specific integrated circuits; flip-chip devices; integrated circuit packaging; lead bonding; ASIC; ball count; bandwidth; flip-chip package; high-speed I/O macro-cell; interconnect; plating bar; wire bonded package; Bandwidth; Bars; Bonding; Costs; Flip chip; Integrated circuit interconnections; Integrated circuit packaging; Radio frequency; Semiconductor device measurement; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference, 2001. Proceedings., 51st

Conference_Location

Orlando, FL

ISSN

0569-5503

Print_ISBN

0-7803-7038-4

Type

conf

DOI

10.1109/ECTC.2001.927965

Filename

927965