Title :
Reliability study for CTE mismatching in build-up structure
Author_Institution :
Nokia Res. Center, Tokyo, Japan
Abstract :
This paper describes the study for dependence of CTE mismatching in build-up structure on reliability. Eight-layer build-up structure was fabricated where four kinds of dielectrics having different CTE value were employed. Two via-chain groups were fabricated inside the substrate and three LSIs were assembled onto the boards. Thermal cycling tests were employed to evaluate reliability and cross-sectional observation was completed to determine the failure mode. Simulation activity was also done to predict thermomechanical behavior of the interconnects. Through the experimental activity, reliability of DSP was analyzed and good agreement of failure mode analysis by thermal cycling tests with finite element method predictive analysis was obtained. CTE mismatching clearly had an effect on the reliability and the smallest CTE value exhibited the highest reliability in the system
Keywords :
Weibull distribution; ball grid arrays; finite element analysis; flip-chip devices; integrated circuit interconnections; integrated circuit reliability; laminates; large scale integration; plastic packaging; thermal expansion; thermal management (packaging); thermal stresses; BGA; CTE mismatch; FEM predictive analysis; LSI; Weibull plot; buildup structure; core laminates; cross-sectional observation; failure mode; flip chip; interconnects; reliability; thermal cycling tests; thermomechanical behavior; via-chain groups; Assembly; Dielectric substrates; Digital signal processing; Electronic packaging thermal management; Failure analysis; Finite element methods; Laminates; Testing; Thermal stresses; Thermomechanical processes;
Conference_Titel :
Electronic Components and Technology Conference, 2001. Proceedings., 51st
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-7038-4
DOI :
10.1109/ECTC.2001.927971