Effects of microvia build-up layers on the solder joint reliability of a wafer level chip scale package (WLCSP)

Author

Lau, John H. ; Lee, S. W Ricky

Author_Institution

Agilent Technol., San Jose, CA, USA

fYear

2001

fDate

2001

Firstpage

1207

Lastpage

1215

Abstract

The effect of a 2-layer microvia build-up printed circuit board (PCB) on the solder joint reliability of a wafer level chip scale package (WLCSP) assembly subject to thermal cycling is investigated in this study. The 62Sn-2Ag-36Pb solder joints are assumed to be: (1) an elastic material; (2) an elastic-plastic material; and (3) a creep material described by the Garofalo-Arrhenius creep constitutive equation. The stress and strain in the corner solder joint of the WLCSP assembly are presented and compared for these three analyses. Besides, the present results are compared with those from the previous analyses on the WLCSP assembly with only one microvia build-up layer

Keywords

chip scale packaging; creep; printed circuit manufacture; reliability; soldering; Garofalo-Arrhenius constitutive equation; Sn-Ag-Pb; creep material; elastic material; elastic-plastic material; microvia build-up layer; printed circuit board; solder joint reliability; thermal cycling; wafer-level chip-scale package; Assembly; Capacitive sensors; Chip scale packaging; Creep; Equations; Joining materials; Printed circuits; Soldering; Thermal stresses; Wafer scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference, 2001. Proceedings., 51st

Conference_Location

Orlando, FL

ISSN

0569-5503

Print_ISBN

0-7803-7038-4

Type

conf

DOI

10.1109/ECTC.2001.927982

Filename

927982