Title :
Verilog HDL methodology for redundancy in digital circuits targeting FPGA technology for highly reliable applications
Author :
Radu, M.E. ; Dabacan, M.A.
Author_Institution :
Rose Hulman Inst. of Technol., Romania
Abstract :
Fault tolerance represents the foundation for critical systems, providing reliable computation and control in a broad range of applications. This is a major area of interest for aerospace and military applications. The need for fault tolerant systems in terrestrial applications is of growing importance also. In such systems, fault tolerance is achieved through redundancy, increasing implementation complexity and costs. This paper presents a methodology for implementing redundant digital circuits using Verilog HDL and targeting FPGA technology. Various redundant digital circuits are presented. For the simulation and implementation of the circuits, Cadence NC and Xilinx design tools were used.
Keywords :
Aerospace electronics; Circuit simulation; Digital circuits; Fault tolerant systems; Field programmable gate arrays; Hardware design languages; Military computing; Redundancy; Space missions; Space technology;
Conference_Titel :
Automation Quality and Testing Robotics (AQTR), 2010 IEEE International Conference on
Conference_Location :
Cluj-Napoca, Romania
Print_ISBN :
978-1-4244-6724-2
DOI :
10.1109/AQTR.2010.5520798