SOI series MOSFET for embedded high voltage applications and soft-error immunity

Author

Cai, Jin ; Ning, Tak ; Oldiges, Philip ; Chou, Anthony ; Kumar, Arvind ; Rausch, Werner ; Haensch, Wilfried ; Shahidi, Ghavam

Author_Institution

T.J. Watson Res. Center, IBM Res. Div., Yorktown Heights, NY

fYear

2008

fDate

6-9 Oct. 2008

Firstpage

21

Lastpage

22

Abstract

We demonstrate a simple and novel scheme to achieve high drain breakdown voltage (BV) in a high-speed silicon-on-insulator (SOI) logic technology. In an SOI device with two FETs in series, the common floating node provides a negative feedback that limits the increase of avalanche current. This unique property of SOI provides a way to enhance the breakdown voltage by simply adding more devices in series. Data from 45 nm SOI technology show BVGt6.5V for two-NFET in series, and BVGt10V for three and four-FET in series. Other benefits of SOI series device include Gt300times reduction in stand-by leakage current and soft-error immunity as compared to a single SOI device. Our result suggests the prospect of integrating high-voltage functions on SOI-based technologies with little or no additional cost.

Keywords

MOSFET; avalanche breakdown; circuit feedback; silicon-on-insulator; SOI series MOSFET; Si; avalanche current; high drain breakdown voltage; high-speed silicon-on-insulator logic technology; integrating high-voltage functions; negative feedback; soft-error immunity; stand-by leakage current; CMOS logic circuits; CMOS technology; FETs; Impact ionization; Leakage current; Logic devices; MOSFET circuits; Negative feedback; Silicon on insulator technology; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, 2008. SOI. IEEE International

Conference_Location

New Paltz, NY

ISSN

1078-621X

Print_ISBN

978-1-4244-1954-8

Electronic_ISBN

1078-621X

Type

conf

DOI

10.1109/SOI.2008.4656275

Filename

4656275