DocumentCode
3166973
Title
Efficient scheduling methods for partitioned systolic algorithms
Author
Kuchibhotla, Prashanth ; Rao, Bhaskar D.
Author_Institution
Dept. of Syst. Sci., California San Diego, La Jolla, CA, USA
fYear
1992
fDate
4-7 Aug 1992
Firstpage
649
Lastpage
663
Abstract
Various methods for mapping signal processing algorithms into systolic arrays have been developed in the past few years. In this paper, efficient scheduling techniques are developed for the partitioning problem, i.e. problems with size that do not match the array size. In particular, scheduling for the locally parallel-globally sequential (LPGS) technique and the locally sequential-globally parallel (LSGP) technique are developed. The scheduling procedure developed exploits the fact that after LPGS and LSGP partitioning, the locality constraints become modified allowing for more flexibility. The new structure allows the authors to develop a flexible scheduling order for LPGS that is useful in evaluating a trade-off between execution time and size of partitioning buffers. The benefits of the scheduling techniques are illustrated with the help of matrix multiplication and least-squares examples
Keywords
parallel algorithms; scheduling; signal processing; systolic arrays; execution time; least-squares examples; locality constraints; locally parallel-globally sequential; locally sequential-globally parallel; mapping signal processing algorithms; partitioned systolic algorithms; scheduling methods; Algorithm design and analysis; Costs; Military computing; Partitioning algorithms; Scheduling algorithm; Signal design; Signal mapping; Systolic arrays; Throughput; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Application Specific Array Processors, 1992. Proceedings of the International Conference on
Conference_Location
Berkeley, CA
ISSN
1063-6862
Print_ISBN
0-8186-2967-3
Type
conf
DOI
10.1109/ASAP.1992.218538
Filename
218538
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