Title :
Development of electroless Ni/Au plated build-up flip chip package with highly reliable solder joints
Author :
Yokomine, K. ; Shimizu, N. ; Miyamoto, Y. ; Iwata, Y. ; Love, D. ; Newman, K.
Author_Institution :
Semicond. Components Group, Kyocera Corp., Kyoto, Japan
Abstract :
Along with the trend towards miniaturization and higher density for electronic equipment, the demand for high density multilayer packaging substrates has increased. A build-up process with electroless Ni/Au plating is a recent area of industry focus to meet the challenging new high density substrate requirements. Surface mount technologies such as Ball Grid Array (BGA) and flip chip assembly are mainstream applications that benefit from build-up substrates. Meanwhile, because of the finer geometry on external pads, reliability issues such as solder joint cracking due to thermal expansion mismatch between the package, chip and printed circuit board have become an area of major concern. Electroless Ni-P/Au plating has previously shown lower reliability at solder joints but the mechanism and the cause for the lower reliability has not been verified, and its analysis and evaluation method have not been fully investigated. In this study, we developed a reliability-improved electroless Ni/Au plated build-up flip chip BGA and clarified the mechanism for solder joint cracking by focusing on the plating conditions of external pads which significantly influence solder joint reliability and its solderability. The areas we improved were mainly related to plating: plating process condition, plating layer formation, plating surface condition, and alloy condition after solder reflow. Electroless Ni-P/Au plating achieved 100% within solder fracture mode at ball shear test by optimizing surface roughness on Cu routing patterns, phosphorus content/thickness/surface conditions, immersion Au plating types, and final cleaning process. We also confirmed the necessity for careful attention on the backend processes including cleaning after Au plating, in order to avoid solderability deterioration. Furthermore, we exposed the mechanism for the solder joint deterioration due to the backend processes including cleaning after Au plating, by analyzing corrosion interface between Ni and Au, and formation on Ni and Sn alloy
Keywords :
ball grid arrays; electroless deposited coatings; flip-chip devices; gold; integrated circuit packaging; nickel; soldering; surface mount technology; Ni-Au; build-up process; electroless Ni/Au plating; electronic equipment; flip-chip ball grid array package; high-density multilayer substrate; solder joint reliability; surface mount technology; Cleaning; Electronic equipment; Electronics packaging; Flip chip; Gold; Packaging machines; Rough surfaces; Soldering; Surface cracks; Surface roughness;
Conference_Titel :
Electronic Components and Technology Conference, 2001. Proceedings., 51st
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-7038-4
DOI :
10.1109/ECTC.2001.928014