A design tool for computations in large grain real-time data flow architectures

A design tool for performance prediction in homogeneous, multicomputer dataflow architectures operating in real time is discussed. Algorithms are restricted to the class of large-grain, decision-free algorithms. Major applications are expected to be real-time implementation of control and signal processing algorithms, where performance is required to be highly predictable. The mapping of such algorithms onto the specified class of dataflow architectures is realized by a marked graph model called the algorithm to architecture mapping model (ATAMM). Performance measures which determine computing speed and throughput capacity are defined, and the lower bounds for these performance measures are stated. Computing resource needs are determined for predictable periodic execution of algorithms. A software design tool is presented to aid the designer in predicting performance and resource requirements