DocumentCode :
3167430
Title :
MUSE-a systolic array for adaptive nulling with 64 degrees of freedom, using Givens transformations and wafer scale integration
Author :
Rader, C.M.
Author_Institution :
MIT Lincoln Lab., Lexington, MA, USA
fYear :
1992
fDate :
4-7 Aug 1992
Firstpage :
277
Lastpage :
291
Abstract :
This paper describes a highly parallel system of computational processors specialized for real-time adaptive antenna nulling computations with many degrees of freedom, which the author calls MUSE, and a specific realization of MUSE for 64 degrees of freedom. Each processor uses the CORDIC algorithm and has been designed as a single integrated circuit. Ninety-six such processors working together can update the 64-element nulling weights based on 300 new observations in only 6.7 milliseconds. This is equivalent to 2.88 Giga-ops for a conventional processor. The computations are accurate enough to support 50 dB of S/N improvement in a sidelobe canceller. The connectivity between processors is quite simple and permits MUSE to be realized on a single large wafer, using restructurable VLSI. The complete design of such a wafer is described
Keywords :
VLSI; digital signal processing chips; systolic arrays; 64 degrees of freedom; CORDIC algorithm; Givens transformations; MUSE; adaptive nulling; computational processors; highly parallel system; matrix update systolic experiment; real-time adaptive antenna nulling computations; restructurable VLSI; sidelobe canceller; systolic array; wafer scale integration; Adaptive arrays; Adaptive systems; Antenna arrays; Interference; Laboratories; Sampling methods; Satellite antennas; Systolic arrays; Vectors; Wafer scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application Specific Array Processors, 1992. Proceedings of the International Conference on
Conference_Location :
Berkeley, CA
ISSN :
1063-6862
Print_ISBN :
0-8186-2967-3
Type :
conf
DOI :
10.1109/ASAP.1992.218565
Filename :
218565
Link To Document :
بازگشت