PID Controller Tuning Rules for Varying Time-Delay Systems

This paper considers the design of PID controllers for systems with varying time-delays. Using the concept of jitter margin combined with the AMIGO tuning rule methodology, novel tuning rules that are robust to varying time-delays are derived. In addition, we give an expression for the expected lower bound of the jitter margin as these tuning rules are applied. Extensive numerical evaluations demonstrate that, for wide range of processes, the new tuning rules achieve significant improvements in jitter margin at the expense of only slight decreases in other performance criteria.