2.5 GHz CMOS power amplifier integrated with low loss matching network for WiMAX applications

Author

Chan, Doris A. ; Feng, Milton

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA

fYear

2009

fDate

7-10 Dec. 2009

Firstpage

1108

Lastpage

1111

Abstract

Power device optimization techniques are systematically incorporated to increase the overall power amplifier (PA) performance in terms of gain, linearity, and power added efficiency (PAE). The prototype PA is implemented in a 130 nm MMRF CMOS process. The single-end PA at 2.5 GHz shows a gain of 31 dB, an output power of 21.4 dBm at the 1 dB compression point, and a PAE of 14.5% while consuming 0.98 W from a 3.3 V supply.

Keywords

CMOS integrated circuits; UHF integrated circuits; UHF power amplifiers; WiMax; CMOS power amplifier; MMRF CMOS process; PA; WiMAX; compression point; frequency 2.5 GHz; gain 31 dB; linearity; low loss matching network; output power; power 0.98 W; power added efficiency; power device optimization techniques; voltage 3.3 V; Broadband amplifiers; Circuits; High power amplifiers; Linearity; Power amplifiers; Power generation; Radio frequency; Radiofrequency amplifiers; Transmitters; WiMAX; CMOS transmitter (TX); Power amplifier (PA); Worldwide Interoperability for Microwave Access (WiMAX);

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference, 2009. APMC 2009. Asia Pacific

Conference_Location

Singapore

Print_ISBN

978-1-4244-2801-4

Electronic_ISBN

978-1-4244-2802-1

Type

conf

DOI

10.1109/APMC.2009.5384388

Filename

5384388