Capping-metal gate integration technology for multiple-VT CMOS in MuGFETs

Author

Veloso, A. ; Witters, L. ; Demand, M. ; Ferain, I. ; Son, N.J. ; Kaczer, B. ; Roussel, Ph J. ; Adelmann, C. ; Brus, S. ; Richard, O. ; Bender, H. ; Conard, T. ; Vos, R. ; Rooyackers, R. ; Van Elshocht, S. ; Collaert, Nadine ; Meyer, K. ; Biesemans, S. ; J

Author_Institution

IMEC, Leuven

fYear

2008

fDate

6-9 Oct. 2008

Firstpage

119

Lastpage

120

Abstract

In this paper, we investigate the potentialities and properties of HfSiO/MG/cap/TiN gate stack devices, first by identifying the impact of the TiN thickness and its deposition procedure on the device characteristics, and by exploring the use of TaN vs. TiN as the 1^st metal layer (MG). Deeper insight into the caps (e.g., Dy) diffusion mechanism is gained by: a) demonstrating stronger diffusion dependence on the metal growth method than on its composition; b) studying the BTI behavior through a careful monitoring of the transients.

Keywords

CMOS integrated circuits; alumina; diffusion; dysprosium; hafnium compounds; insulated gate field effect transistors; titanium compounds; HfSiO-Dy-Al₂O₃-TiN; PE-ALD; capping-metal gate integration technology; deposition procedure; device characteristics; diffusion mechanism; finFET-based multigate devices; gate stack devices; metal growth method; metal layer; multiple-V_T CMOS; CMOS technology; Circuits; Conference proceedings; Electrodes; Fabrication; High K dielectric materials; High-K gate dielectrics; MOS devices; Monitoring; Tin;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, 2008. SOI. IEEE International

Conference_Location

New Paltz, NY

ISSN

1078-621X

Print_ISBN

978-1-4244-1954-8

Electronic_ISBN

1078-621X

Type

conf

DOI

10.1109/SOI.2008.4656323

Filename

4656323