Title :
Low-level error recovery mechanism for self-checking sequential circuits
Author :
Favalli, Michele ; Metra, Cecilia
Author_Institution :
Dipt. di Elettronica, Inf. e Sistemistica, Bologna Univ., Italy
Abstract :
To match the reliability requirements of small embedded systems, a design methodology is proposed that provides some fault tolerant capabilities to self-checking sequential circuits. By means of simple modifications, such circuits are made fault tolerant with respect to transient, crosstalk and delay faults, while they maintain their self-checking capabilities with respect to permanent faults. The method requires a small area overhead and may also provide some benefit from the yield point of view
Keywords :
CMOS logic circuits; crosstalk; delays; fault tolerant computing; integrated circuit reliability; integrated circuit testing; logic design; logic testing; sequential circuits; crosstalk faults; delay faults; design methodology; fault tolerant capabilities; low-level error recovery mechanism; reliability requirements; self-checking sequential circuits; small embedded systems; transient faults; Application software; Circuit faults; Circuit testing; Delay; Embedded software; Fault tolerance; Fault tolerant systems; Hardware; Semiconductor device modeling; Sequential circuits;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 1997. Proceedings., 1997 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
0-8186-8168-3
DOI :
10.1109/DFTVS.1997.628330
