Compound semiconductors on silicon for future generation VLSI

High mobility channel materials are likely to be required at and beyond the 11 nm technology node to maintain the historical trend of performance @ power improvement with each node introduction [1]. Compound semiconductors (based on In-Ga-As ΠI-V materials) are widely seen as the most likely nMOS solution due to their high electron mobility and velocity. Local (selective) hetero-integration in the form of fully depleted channels on large area silicon substrates and VLSI process flow compatibility will be required to maintain cost effectiveness and manufacturability. This paper focuses on the key challenges of material heterointegration and device integration using a 200 mm Si substrate and a state of the art VLSI compatible Si processing tool set.