Improvement of the tolerance to total ionizing dose in SOI CMOS

Author

Domae, Y. ; Komatsubara, H. ; Shindou, H. ; Makihara, A. ; Kuboyama, S. ; Ida, J.

Author_Institution

Semicond. R&D Dept., Oki Electr. Ind. Co.Ltd., Tokyo

fYear

2008

fDate

6-9 Oct. 2008

Firstpage

135

Lastpage

136

Abstract

According to the CMOS device on SOI substrate (SOI CMOS device), we investigate the influence of holes accumulated in buried oxide film (BOX) under the radiation environment by monitoring leakage current with back bias. We confirmed that the leakage current has the colleration to total ionizing dose (TID). SOI CMOS assumed to be not good on TID, compared to bulk. But, we confirmed the tolerance to TID in SOI CMOS was improved from 200 to 3000 Gy(Si) with the process optimization, which is better than bulk CMOS.

Keywords

CMOS integrated circuits; accumulation layers; buried layers; leakage currents; optimisation; radiation hardening (electronics); semiconductor device reliability; silicon-on-insulator; tolerance analysis; SOI CMOS device; SOI substrate; Si; buried oxide film; hole accumulation; ionizing dose tolerance; leakage current; optimization; radiation hardness; Aerospace industry; Boron; CMOS process; Circuits; Conference proceedings; Flip-flops; Isolation technology; Leakage current; Radiation monitoring; Substrates;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, 2008. SOI. IEEE International

Conference_Location

New Paltz, NY

ISSN

1078-621X

Print_ISBN

978-1-4244-1954-8

Electronic_ISBN

1078-621X

Type

conf

DOI

10.1109/SOI.2008.4656331

Filename

4656331