• DocumentCode
    316858
  • Title

    PA-8000: a case study of static and dynamic branch prediction

  • Author

    Burch, Carl

  • Author_Institution
    Hewlett-Packard Co., Colorado Springs, CO, USA
  • fYear
    1997
  • fDate
    12-15 Oct 1997
  • Firstpage
    97
  • Lastpage
    105
  • Abstract
    While many dynamic branch prediction schemes have been proposed and studied, few have been compared to static branch prediction. Fewer yet have been implemented side-by-side on the same machine to allow full performance evaluation. The Hewlett-Packard PA-8000 microprocessor implements both a simple dynamic prediction scheme and static prediction, selectable by the application programmer. This paper studies the PA-8000´s trade-off between static and dynamic prediction, and the compiler optimizations needed to support an innovative static branch prediction convention while maintaining object code compatibility with earlier revisions of the PA-RISC architecture
  • Keywords
    microprocessor chips; optimising compilers; performance evaluation; reduced instruction set computing; Hewlett-Packard PA-8000 microprocessor; PA-RISC architecture; application programmer; compiler optimizations; dynamic branch prediction; performance evaluation; static branch prediction; Computer aided software engineering; Costing; Microprocessors; Optimizing compilers; Out of order; Pipelines; Pollution; Programming profession; Reduced instruction set computing; Registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1997. ICCD '97. Proceedings., 1997 IEEE International Conference on
  • Conference_Location
    Austin, TX
  • ISSN
    1063-6404
  • Print_ISBN
    0-8186-8206-X
  • Type

    conf

  • DOI
    10.1109/ICCD.1997.628855
  • Filename
    628855