Title :
Design and performance evaluation of a cache assist to implement selective caching
Author :
John, Lizy Kurian ; Subramanian, Akila
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Abstract :
Conventional cache architectures exploit locality, but do so rather blindly. By forcing all references through a single structure, the cache´s effectiveness on many references is reduced. This paper presents a cache assist namely the annex cache which implements a selective caching scheme. Except for filling a main cache at cold start, all entries come to the cache via the annex cache. Items referenced only rarely will be excluded from the main cache, eliminating several conflict misses. The basic premise is that an item deserves to be in the main cache only if it can prove its right to exist in the main cache by demonstrating locality. The annex cache combines the features of Jouppi´s (1990) victim caches and McFarling´s (1992) cache exclusion schemes. Extensive simulation studies for annex and victim caches using a variety of SPEC programs are presented in the paper. Annex caches were observed to be significantly better than conventional caches, better than victim caches in certain cases, and comparable to victim caches in other cases
Keywords :
cache storage; memory architecture; performance evaluation; storage management; SPEC programs; annex cache; cache architectures; cache exclusion schemes; cache storage design; conflict misses; locality; performance evaluation; references; selective caching; selective caching scheme; simulation; victim cache; Computer science; Costs; Delay; Filling; Pollution control; Read-write memory;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1997. ICCD '97. Proceedings., 1997 IEEE International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
0-8186-8206-X
DOI :
10.1109/ICCD.1997.628916