• DocumentCode
    3168700
  • Title

    Cryogenic ultra low power CMOS

  • Author

    Burr, J.B.

  • Author_Institution
    Dept. of Electr. Eng., Stanford Univ., CA, USA
  • fYear
    1995
  • fDate
    9-11 Oct. 1995
  • Firstpage
    82
  • Lastpage
    83
  • Abstract
    This paper reports 7-stage 1.5 /spl mu/m zeroVt CMOS ring oscillators operating at 170 MHz/V down to V/sub dd/=70 mV at room temperature, and 360 MHz/V down to V/sub dd/=27 mV at 77 K.
  • Keywords
    CMOS integrated circuits; circuit optimisation; cryogenic electronics; integrated circuit design; integrated circuit testing; 1.5 mum; 27 to 70 mV; 330 mV; 77 to 295 K; CMOS ring oscillators; Stanford Flexible Baseline Process; cryogenic ULP; cryogenic ultra low power CMOS; energy efficiency; threshold voltage shifts; total energy minimization; CMOS technology; Cryogenics; Integrated circuit technology; Laboratories; Low voltage; Ring oscillators; Space technology; Temperature; Testing; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Low Power Electronics, 1995., IEEE Symposium on
  • Conference_Location
    San Jose, CA, USA
  • Print_ISBN
    0-7803-3036-6
  • Type

    conf

  • DOI
    10.1109/LPE.1995.482473
  • Filename
    482473
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3168700