• DocumentCode
    3170121
  • Title

    Steering and forwarding techniques for reducing memory communication on a clustered microarchitecture

  • Author

    Irie, Hidetsugu ; Hattori, Naoya ; Takada, Masanori ; Hatta, Naoya ; Toyoshima, Takashi ; Sakai, Suichi

  • Author_Institution
    Graduate Sch. of Inf. Sci. & Technol., Tokyo Univ., Japan
  • fYear
    2005
  • fDate
    17 Jan. 2005
  • Abstract
    In a clustered micro architecture design, the execution core which has large RAMs, large CAMs and all connected result bypass loops is partitioned into smaller execution cores that are called clusters. Clustered microarchitecture can allow a scalable core design because intra-cluster operation remains fast regardless of entire execution width of the core. But localization of critical memory transfers (store-load-consumer) is still a problem. In this work, we propose a technique named "distributed speculative memory forwarding (DSMF)" that localizes critical memory transfers into a cluster. DSMF learns memory dependences at retire stage, steers dependent pair of the store and the consumer to the same cluster, transfers data locally in the cluster. We show that the IPC improvement of 15% was obtained by this localization on the baseline clustered microarchitecture.
  • Keywords
    logic design; memory architecture; clustered microarchitecture; critical memory transfer; distributed speculative memory forwarding; memory communication reduction; scalable core design; Cams; Delay; Information science; Laboratories; Logic; Microarchitecture; Microprocessors; Pipelines; Random access memory; Reduced instruction set computing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Innovative Architecture for Future Generation High-Performance Processors and Systems, 2005
  • ISSN
    1537-3223
  • Print_ISBN
    0-7695-2483-4
  • Type

    conf

  • DOI
    10.1109/IWIA.2005.41
  • Filename
    1587821