DocumentCode
3170301
Title
SIMD optimization in COINS compiler infrastructure
Author
Suzuki, Mitsugu ; Fujinami, Nobuhisa ; Fukuoka, Takeaki ; Watanabe, Tan ; Nakata, Ikuo
Author_Institution
Univ. of Electro-Commun., Japan
fYear
2005
fDate
17 Jan. 2005
Abstract
COINS is a compiler infrastructure that makes it easy to construct a new compiler by adding/modifying only part of the COINS of compiling/optimization features. SIMD optimization is a major advantage. We present an overview of COINS and some topics on its SIMD optimization.
Keywords
parallel processing; program compilers; COINS compiler infrastructure; SIMD optimization; Computer languages; Computer science; Design optimization; Instruction sets; Java; Motion analysis; Optimizing compilers; Power generation; Program processors; Virtual manufacturing;
fLanguage
English
Publisher
ieee
Conference_Titel
Innovative Architecture for Future Generation High-Performance Processors and Systems, 2005
ISSN
1537-3223
Print_ISBN
0-7695-2483-4
Type
conf
DOI
10.1109/IWIA.2005.40
Filename
1587834
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