DocumentCode
3170789
Title
Predicting ΣΔ frequency synthesizer performance
Author
Fan, Yiping
Author_Institution
Philips Semicond., San Jose, CA, USA
Volume
2
fYear
2002
fDate
29 June-1 July 2002
Firstpage
1551
Abstract
This paper describes a nonlinear mathematical model which can be used to predict ΣΔ frequency synthesizer fractional spur and phase noise levels. The model applies to ideal circuits or circuits with nonlinearity, such as mismatch of the phase detector and charge pump. This model was first established based on an ideal circuit and nonlinearity was added next. The model based predictions were compared against circuit-equivalent simulation results and measurement data from a commercial IC. Excellent correlation was achieved. The model also shows that the phase noise is not sensitive to the mismatch while the fractional spur is.
Keywords
frequency synthesizers; integrated circuit noise; mixed analogue-digital integrated circuits; modelling; monolithic integrated circuits; phase noise; sigma-delta modulation; ΣΔ frequency synthesizer performance; frequency synthesizer IC; model based predictions; nonlinear mathematical model; phase detector mismatch; synthesizer fractional spur levels; synthesizer performance prediction; synthesizer phase noise levels; 1f noise; Circuit noise; Circuit simulation; Frequency synthesizers; Mathematical model; Phase noise; Predictive models; Radio frequency; Semiconductor device noise; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Circuits and Systems and West Sino Expositions, IEEE 2002 International Conference on
Print_ISBN
0-7803-7547-5
Type
conf
DOI
10.1109/ICCCAS.2002.1179074
Filename
1179074
Link To Document