Trimming analog circuits using floating-gate analog MOS memory

The author presents an analog trim-voltage memory (ATVM) which employs a floating-gate MOS structure similar to that used in digital electrically erasable and programmable read-only memories (EEPROMs). The ATVM is suitable for trimming the offset voltages and currents resulting from threshold mismatches in analog circuits such as operational amplifiers and comparators. It can be incorporated into a standard digital CMOS process without the additional processing steps typically needed for EEPROM fabrication. This floating-gate memory uses hot-electron injection to decrease the floating-gate voltage and electron tunneling from the floating gate to increase the voltage. A possible use of the ATVM circuit is shown along with the input stage of a two-stage Miller compensated op amp.<>