Title :
Quality factor enhancement of on-chip inductor by using negative impedance circuit
Author :
Pham, Khoa D. ; Okada, Kenichi ; Masu, Kazuya
Author_Institution :
Tokyo Inst. of Technol., Yokohama, Japan
Abstract :
A method to improve quality factor (Q) value of inductor is presented in this paper. A negative impedance circuit (NIC) is employed to reduce parasitic resistances and parasitic capacitances of oxide layer and silicon substrate. Simulation results show that the inductor with NIC can improve Q up to 23.1% compared to the inductor without NIC. In frequency range from 2GHz to 6GHz, Q is improved significantly. Moreover, unconsidered reduction in self-resonant frequency of the inductor is also observed.
Keywords :
Q-factor; inductors; microwave devices; semiconductor device models; 2 to 6 GHz; negative impedance circuit; on-chip inductor; oxide layer; parasitic capacitances; parasitic resistances; quality factor enhancement; self-resonant frequency; silicon substrate; CMOS technology; Capacitance; Circuit simulation; Conductivity; Impedance; Inductors; Q factor; Radio frequency; Silicon on insulator technology; Spirals;
Conference_Titel :
Silicon Monolithic Integrated Circuits in RF Systems, 2006. Digest of Papers. 2006 Topical Meeting on
Print_ISBN :
0-7803-9472-0
DOI :
10.1109/SMIC.2005.1587921
