• DocumentCode
    3172137
  • Title

    FPGA based image processing unit usage in coin detection and counting

  • Author

    Dhanabal, R. ; Sahoo, Sarat Kumar ; Bharathi, V. ; Dowluri, Kalyan ; Phanindra Varma, Bh S. R. ; Sasiraju, V.

  • Author_Institution
    ECE - Dept., VIT Univ., Vellore, India
  • fYear
    2015
  • fDate
    19-20 March 2015
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    Processing enhancement of a digital Image is really important now a day, as it plays a crucial role in mobile technology, multimedia, medicine and several DSP applications. The solution to enhance the quality of systems linked to image processing is hardware based processing of an image by using FPGA´S. In this, a discussion about implementation of circle detection and coin counting is done by changing brightness, threshold and contrast of a digital image and simulated result by the help of a language for description of hardware, verilog was done. Algorithm for step wise implementation of Brightness manipulation, Operating Threshold and Contrast stretching is implemented which gives an efficient implementation than normal edge detecting kind of counting coins.
  • Keywords
    field programmable gate arrays; hardware description languages; image enhancement; object detection; FPGA based image processing; Verilog; brightness manipulation; circle detection; coin counting; coin detection; contrast stretching; digital image enhancement; hardware based image processing; operating threshold; Brightness; Computers; Digital signal processing; Field programmable gate arrays; Hardware; Hardware design languages; Image processing; Coin counting; Digitalized processed Image; FPGA; Object enumerating; Verilog;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuit, Power and Computing Technologies (ICCPCT), 2015 International Conference on
  • Conference_Location
    Nagercoil
  • Type

    conf

  • DOI
    10.1109/ICCPCT.2015.7159440
  • Filename
    7159440