• DocumentCode
    3172598
  • Title

    Divide and conquer: a strategy for synthesis of low power finite state machines

  • Author

    Dasgupta, Aurobindo ; Ganguly, Shantanu

  • Author_Institution
    Motorola Inc., Austin, TX, USA
  • fYear
    1997
  • fDate
    12-15 Oct 1997
  • Firstpage
    740
  • Lastpage
    745
  • Abstract
    The authors propose a method to synthesize finite state machines (FSMs) for low power. The method consists of two stages-disjunctive partitioning and selective operation. In disjunctive partitioning, the state transitions of an FSM are judiciously partitioned such that all state transitions originating from a state are assigned to one partition. This partitioning can be directed by objectives such as uniform heat distribution and hot-carrier and electromigration reliability. In the second stage, selective operation, the partitioned states are encoded such that for a given encoding for the states, only one partition is required to compute the next state encoding. This is then used to cut back on unnecessary switching, by selectively turning off all partitions except the necessary one, consequently saving on power. Of added significance, is that multiple objectives can be simultaneously tackled in the proposed approach. Since partitioning minimizes the delay (the delay is equal to the maximum delay among the partitions), the proposed method stands apart from most power minimization techniques by simultaneously minimizing both power and delay. Furthermore, objectives such as heat distribution can be used to drive the disjunctive partitioning stage. Power reductions of 50% are achievable using the proposed approach
  • Keywords
    divide and conquer methods; electromigration; finite state machines; logic partitioning; minimisation of switching nets; delay minimization; disjunctive partitioning; divide and conquer; electromigration reliability; heat distribution; hot-carrier reliability; low power finite state machine synthesis; power minimization; selective operation; state encoding; state transitions; switching; uniform heat distribution; Automata; Clocks; Delay; Electromigration; Encoding; Hot carriers; Integrated circuit technology; Minimization; Switching circuits; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1997. ICCD '97. Proceedings., 1997 IEEE International Conference on
  • Conference_Location
    Austin, TX
  • ISSN
    1063-6404
  • Print_ISBN
    0-8186-8206-X
  • Type

    conf

  • DOI
    10.1109/ICCD.1997.628947
  • Filename
    628947