Control method for cascaded H-bridge multilevel inverter with faulty power cells

Author

Wei, Sanmin ; Wu, El ; Li, Fahai ; Sun, Xudong

Author_Institution

Dept. of Electr. & Comput. Eng., Ryerson Univ., Toronto, Ont., Canada

Volume

1

fYear

2003

fDate

9-13 Feb. 2003

Firstpage

261

Abstract

To increase the fault tolerance for cascaded H-bridge multilevel inverters, a novel control algorithm is proposed for the inverter operating under faulty conditions. The influence of various faults on space vectors is investigated and the maximum achievable output voltage of the inverter with faulty power cells is derived. Making use of the redundant switching states, the proposed algorithm is able to produce a three-phase balanced line-to-line voltage with minimum harmonic distortion for the inverter with disabled power cells. In addition, the control algorithm is suitable for use in the cascaded H-bridge inverters of any voltage levels. Simulation and experimental results are provided for verification.

Keywords

PWM invertors; bridge circuits; electrical faults; fault tolerance; harmonics suppression; power conversion harmonics; switching convertors; voltage control; cascaded H-bridge multilevel inverter; control algorithm; control method; disabled power cells; faulty power cells; maximum achievable output voltage; minimum harmonic distortion; redundant switching states; space vector modulation; space vectors; three-phase balanced line-to-line voltage; Diodes; Harmonic distortion; Insulated gate bipolar transistors; Power engineering and energy; Power engineering computing; Pulse width modulation inverters; Space vector pulse width modulation; Sun; Switches; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Applied Power Electronics Conference and Exposition, 2003. APEC '03. Eighteenth Annual IEEE

Conference_Location

Miami Beach, FL, USA

Print_ISBN

0-7803-7768-0

Type

conf

DOI

10.1109/APEC.2003.1179224

Filename

1179224