Title :
Timing verification of a 45nm SOI standard cell library
Author :
Pelloie, Jean-Luc ; Laplanche, Yves ; Hawkins, Chris ; Kundu, Roma
Author_Institution :
ARM, Grenoble, France
Abstract :
A reliable timing verification methodology has been developed and proven on a 45nm SOI standard cell library. This methodology is currently used at more advanced process nodes.
Keywords :
silicon-on-insulator; timing circuits; SOI standard cell library; advanced process nodes; timing verification methodology; Delay; History; Inverters; Steady-state; Switches; Temperature measurement;
Conference_Titel :
SOI Conference (SOI), 2010 IEEE International
Conference_Location :
San Diego, CA
Print_ISBN :
978-1-4244-9130-8
Electronic_ISBN :
1078-621x
DOI :
10.1109/SOI.2010.5641402
