• DocumentCode
    3174589
  • Title

    Event-driven Scheduling for Parallel Stream Processing

  • Author

    Leidi, Tiziano ; Heeb, Thierry ; Colla, Marco ; Thiran, Jean-Philippe

  • Author_Institution
    CIMSI Inst., SUPSI, Manno, Switzerland
  • fYear
    2011
  • fDate
    3-7 April 2011
  • Firstpage
    36
  • Lastpage
    41
  • Abstract
    To optimize real-time stream-processing applications for chip-level multi processors, several challenges have to be met. Poor scalability and poor internal data pressure may result from serial dependencies within or between the algorithms. Load imbalances introduced by the parallel-processing hardware and execution environment may also limit performance. To maximize the throughput and minimize the latency of parallel stream-processing applications, we propose an approach that complements run-time dynamic load balancing with static pre-compile partitioning. In our solution, the dynamic features are based on event-driven scheduling, while the static features benefit from profile-guided automatic optimizations. In this paper, we present some recent enhancements of DSPE, an open-source development environment, featuring model and source code generators for prototyping, refining and customizing real-time stream-processing applications. By using our approach on micro-benchmarks and sample applications, we also show that it is possible to reduce the impact of the different speed-up constrainers.
  • Keywords
    electronic engineering computing; microprocessor chips; multiprocessing systems; parallel processing; scheduling; DSPE; chip-level multiprocessor; digital stream processing environment; event-driven scheduling; open-source development environment; parallel stream processing; profile-guided automatic optimization; real-time stream-processing; run-time dynamic load balancing; source code generator; static feature; static precompile partitioning; Dynamic scheduling; Engines; Heuristic algorithms; Parallel processing; Scalability; Software; Software algorithms; code generation; dynamic load-balancing; event-driven scheduling; parallel processing; profile-guided optimizations; stream processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Computing in Electrical Engineering (PARELEC), 2011 6th International Symposium on
  • Conference_Location
    Luton
  • Print_ISBN
    978-1-4577-0078-1
  • Electronic_ISBN
    978-0-7695-4397-0
  • Type

    conf

  • DOI
    10.1109/PARELEC.2011.14
  • Filename
    5770398