A floating RESURF EDMOS with enhanced safe operating area

Author

Wang, Hao ; Yoo, Abraham ; Xu, H. P Edward ; Ng, Wai Tung ; Fukumoto, Kenji ; Ishikawa, Akira ; Imai, Hisaya ; Sakai, Kimio ; Takasuka, Kaoru

Author_Institution

Univ. of Toronto, Toronto

fYear

2007

fDate

16-20 Dec. 2007

Firstpage

751

Lastpage

755

Abstract

In this paper, a floating RESURF EDMOS (BV=55V, R_on,sp=36.5mOmega-mm²) with 400% enhanced Safe Operating Area (SOA) will be discussed and compared to the conventional EDMOS structure. The proposed EDMOS has both drain and source engineering to enhance SOA, not only via reducing the base resistance of the parasitic bipolar transistor, but also suppressing the base current of the parasitic bipolar transistor at high VGs and high VDs situations. Furthermore, the buried deep Nwell allow the device to have better tradeoff between breakdown voltage and on-resistance.

Keywords

MOSFET; bipolar transistors; EDMOS transistors; breakdown voltage; floating RESURF; parasitic bipolar transistors; safe operating area; voltage 55 V; Bipolar transistors; Driver circuits; Electric breakdown; Electrons; Helium; Impact ionization; MOSFETs; Semiconductor optical amplifiers; Turning; Voltage; EDMOS; Safe Operation Area (SOA); floating RESURF; parasitic bipolar transistor;

fLanguage

English

Publisher

ieee

Conference_Titel

Physics of Semiconductor Devices, 2007. IWPSD 2007. International Workshop on

Conference_Location

Mumbai

Print_ISBN

978-1-4244-1728-5

Electronic_ISBN

978-1-4244-1728-5

Type

conf

DOI

10.1109/IWPSD.2007.4472628

Filename

4472628