DocumentCode
3175790
Title
Double-Layer Evolvable Hardware Method
Author
Liu, Shuyong ; Zhang, Guoyin
Author_Institution
Coll. of Comput. Sci. & Technol., Harbin Eng. Univ., HEU, Harbin, China
fYear
2009
fDate
21-22 Dec. 2009
Firstpage
313
Lastpage
315
Abstract
One of the bottlenecks in traditional evolvable hardware is that the fitness evaluation process is restricted by the performance of the reconfigurable hardware, so that the overall evolution efficiency is very low. In order to solve the problem we propose a double-layer evolvable hardware method, which is composed of logical evolving layer and physical evolving layer. The chromosome coding based on the logic operation unit is used in logical evolving, which can implement the rapid fitness evaluation process in computer without the FPGA and other hardware. Based on the result of logical evolving, the physical evolving uses classical evolving method to evolve the physical characters of target circuit. Thus, the efficiency and the popularity of the evolvable hardware can both be improved.
Keywords
cellular biophysics; field programmable gate arrays; medical computing; FPGA; chromosome coding; double-layer evolvable hardware method; fitness evaluation process; logic operation unit; Biological cells; Cells (biology); Computer science; Digital circuits; Educational institutions; Field programmable gate arrays; Genetic mutations; Hardware; Logic circuits; Space technology; chromosome coding; evolvable hardware; logical evolving; physical evolving;
fLanguage
English
Publisher
ieee
Conference_Titel
Internet Computing for Science and Engineering (ICICSE), 2009 Fourth International Conference on
Conference_Location
Harbin
Print_ISBN
978-1-4244-6754-9
Type
conf
DOI
10.1109/ICICSE.2009.16
Filename
5521581
Link To Document