• DocumentCode
    3175896
  • Title

    TSV residual Cu step height analysis by white light interferometry for 3D integration

  • Author

    Smith, Daniel ; Singh, Sanjeev ; Ramnath, Yudesh ; Rabie, Mohamed ; Dingyou Zhang ; England, Luke

  • Author_Institution
    GLOBALFOUNDRIES, Malta, NY, USA
  • fYear
    2015
  • fDate
    26-29 May 2015
  • Firstpage
    578
  • Lastpage
    584
  • Abstract
    Cu pumping, or the extrusion of Cu out of a TSV after being subjected to high temperature conditions, is one of the highest risk failure modes to be overcome in the development of TSV-middle integration for 3D packaging technologies. Typical Cu pumping analyses focus on a low number of data points through brute force measurement using cross sectional analysis. The low number of data points gathered for each condition does not provide results with a high statistical confidence level. In addition, it is most likely that the cross section does not provide measurement along the plane that contains the highest amount of Cu pumping, resulting in inaccurate maximum pumping height measurements. In this study, a Cu pumping measurement technique was developed using a production capable scanning white light interferometry (SWLI) system, which enables the collection of hundreds or thousands of individual TSV Cu pumping data points. This enables an accurate statistical comparison between Cu pumping mitigation schemes. Using this technique, multiple TSV plating process and thermal annealing conditions were compared by varying temperature and time to determine the conditions that resulted in the lowest amount of Cu pumping. In addition, an alternate integration scheme was investigated that includes multiple anneal and CMP planarization steps. The experimental results demonstrate that Cu pumping can be kept to a manageable level for high reliability performance.
  • Keywords
    annealing; chemical mechanical polishing; copper; electroplating; failure analysis; integrated circuit packaging; light interferometry; planarisation; statistical analysis; three-dimensional integrated circuits; 3D integration; 3D packaging technology; CMP planarization; Cu; SWLI system; TSV plating process; TSV residual copper step height analysis; TSV-middle integration; brute force measurement; chemical mechanical polishing; copper pumping analysis; copper pumping measurement technique; copper pumping mitigation scheme; cross sectional analysis; risk failure mode; scanning white light interferometry; statistical confidence level; thermal annealing; Annealing; Optical surface waves; Stress; Surface topography; Temperature measurement; Through-silicon vias; 3D Integration; Anneal; BEOL Reliability; Cu Pumping; SWLI; TSV;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC) , 2015 IEEE 65th
  • Conference_Location
    San Diego, CA
  • Type

    conf

  • DOI
    10.1109/ECTC.2015.7159649
  • Filename
    7159649