• DocumentCode
    3176159
  • Title

    Mis-match characterization of 1.8 V and 3.3 V devices in 0.18 μm mixed signal CMOS technology

  • Author

    Yeh, Ta-Hsun ; Lin, Jason C H ; Wong, Shyh-Chyi ; Huang, Honda ; Sun, Jack Y C

  • Author_Institution
    Logic Technol. Dev. Div., Taiwan Semicond. Manuf. Co., Hsinchu, Taiwan
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    77
  • Lastpage
    82
  • Abstract
    This paper studies the mis-match characteristics of 1.8 V and 3.3 V multiple threshold voltage devices, including nominal Vt, medium Vt and native devices in 0.18 μm mixed signal CMOS technology for precision analog design. Three test structures, cross couple, stripe pair and parallel patterns, are presented to investigate the structure dependent mismatch behaviour. Matching characteristics of four analog parameters: Vt, Idsat, β and G ds, are investigated in terms of device size, layout configuration and process condition. An additional analytical model of current mis-match including Vt, β, source and drain series resistance and carrier velocity factor has been verified, in addition to global distortion of gate oxide thickness and substrate doping concentration
  • Keywords
    CMOS integrated circuits; dielectric thin films; doping profiles; electric current; electric resistance; integrated circuit design; integrated circuit modelling; integrated circuit testing; mixed analogue-digital integrated circuits; 0.18 micron; 1.8 V; 3.3 V; analog design; analog parameters; analytical current mis-match model; carrier velocity factor; cross couple pattern; device size; drain saturation current; gate oxide thickness; global distortion; layout configuration; matching characteristics; medium threshold voltage; mis-match characteristics; mis-match characterization; mixed signal CMOS technology; multiple threshold voltage devices; nominal threshold voltage; parallel pattern; process condition; source/drain series resistance; stripe pair pattern; structure dependent mismatch behaviour; substrate doping concentration; test structures; threshold voltage; Analytical models; CMOS technology; Circuits; Current measurement; Distortion measurement; Electric variables measurement; Electrical resistance measurement; Immune system; Semiconductor device measurement; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronic Test Structures, 2001. ICMTS 2001. Proceedings of the 2001 International Conference on
  • Conference_Location
    Kobe
  • Print_ISBN
    0-7803-6511-9
  • Type

    conf

  • DOI
    10.1109/ICMTS.2001.928641
  • Filename
    928641