Design of programmable Op-Amps with minimized DC variations at output

As Analog CMOS ICs are prone to process variations, a minute change in the WIL ratio during fabrication might vary the specifications of the Op-Amp drastically. It is therefore essential to develop a means by which, the specification of IC can be restored even after fabrication. One such approach is to make Analog ICs programmable, so that the specifications can be restored by applying digital input. But this technique is not direct. It is investigated in our work that this technique drifts the output DC voltage (bias voltage), as the bias current varies and therefore creating threat to linear operation of Op-Amp. In this work, a modified programmable Op-Amp with counter programmable level shifter as third stage is proposed. This circuit reduces the variation of the DC voltage with programming current and allows programming of parameters without affecting the biasing. Our simulations indicate that the modified programmable miller two stage op-amp results in linear variation of Slew Rate with digital input. Programming folded cascode Op-Amp, on the other hand shows considerable variation in gain and phase margin. It is experimentally found that the proposed circuit reduces the effect of DC variation by 70% of the previous work.