• DocumentCode
    3177176
  • Title

    ACTIV-LOCSTEP: a test generation procedure based on logic simulation and fault activation

  • Author

    Pomeranz, I. ; Reddy, S.M.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
  • fYear
    1997
  • fDate
    24-27 June 1997
  • Firstpage
    144
  • Lastpage
    151
  • Abstract
    We present a test generation procedure for synchronous sequential circuits referred to as ACTIV-LOCSTEP. Like its predecessor LOCSTEP, ACTN-LOCSTEP generates test sequences at low computational costs by using randomized search and avoiding fault oriented test generation. However, ACTIV-LOCSTEP is fundamentally different from LOCSTEP, being based on the following observation. Consider an input sequence C that consists of a transient C/sub 1/, followed by a periodic part C/sub 2/ that takes the fault free circuit through a cycle of states. Suppose that a fault f is activated during the cycle. If the same input sequence does not create a cycle in the faulty circuit, or creates a cycle of a different length than the one traversed by the fault free circuit, then f is likely to be detected after several repetitions of C/sub 2/ In the resulting procedure, the test sequence length is controlled by restricting the length of the input sequence C and the number of repetitions of the periodic part. Our experiments indicate that relatively short sequences and small numbers of repetitions of the periodic part of the sequence allow large numbers of faults to be detected.
  • Keywords
    automatic test software; circuit analysis computing; logic CAD; logic testing; sequential circuits; ACTIV-LOCSTEP; fault activation; fault free circuit; fault oriented test generation; faulty circuit; logic simulation; randomized search; synchronous sequential circuits; test generation procedure; test sequence length; test sequences; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Electrical fault detection; Fault detection; Logic testing; Sequential analysis; Sequential circuits; Synchronous generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Fault-Tolerant Computing, 1997. FTCS-27. Digest of Papers., Twenty-Seventh Annual International Symposium on
  • Conference_Location
    Seattle, WA, USA
  • ISSN
    0731-3071
  • Print_ISBN
    0-8186-7831-3
  • Type

    conf

  • DOI
    10.1109/FTCS.1997.614087
  • Filename
    614087