DocumentCode
3177356
Title
Robust search algorithms for test pattern generation
Author
Silva, J.O.M. ; Sakallah, K.A.
Author_Institution
Cadence Eur. Lab., Inst. Superior Tecnico, Lisbon, Portugal
fYear
1997
fDate
24-27 June 1997
Firstpage
152
Lastpage
161
Abstract
In recent years several highly effective algorithms have been proposed for Automatic Test Pattern Generation (ATPG). Nevertheless, most of these algorithms too often rely on different types of heuristics to achieve good empirical performance. Moreover there has not been significant research work on developing algorithms that are robust, in the sense that they can handle most faults with little heuristic guidance. In this paper we describe an algorithm for ATPG that is robust and still very efficient. In contrast with existing algorithms for ATPG, the proposed algorithm reduces heuristic knowledge to a minimum and relies on an optimized search algorithm for effectively pruning the search space. Even though the experimental results are obtained using an ATPG tool built on top of a Propositional Satisfiability (SAT) algorithm, the same concepts can be integrated on application-specific algorithms.
Keywords
automatic test software; combinational circuits; logic CAD; logic testing; search problems; application-specific algorithms; heuristic knowledge; heuristics; optimized search algorithm; propositional satisfiability algorithm; robust search algorithms; test pattern generation; Automatic test pattern generation; Automatic testing; Circuit faults; Decision making; Electrical fault detection; Fault detection; Fault diagnosis; Laboratories; Robustness; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Fault-Tolerant Computing, 1997. FTCS-27. Digest of Papers., Twenty-Seventh Annual International Symposium on
Conference_Location
Seattle, WA, USA
ISSN
0731-3071
Print_ISBN
0-8186-7831-3
Type
conf
DOI
10.1109/FTCS.1997.614088
Filename
614088
Link To Document